Intel chief happens to reveal thunderbolt 5

Anandtech managed to see a photo that was shared on Twitter on Sunday by Gregory Bryant, head of the Intel department Client Computing Group.

The photo was not remarkable purely photographically, but in the background was a picture from a presentation about the future thunderbolt technology, and thus seems to reveal thunderbolt 5.

The picture from the presentation shows two diagrams that do not say much, and clipped text that reads:

[…]SB 80G is targeted to support the existing USB-C ecosystem
[…]he PHY will be based on a novel PAM-3 modulation technology
[…]N6 test-chip focusing on the new PHY technology is working in
[…]showing promising results

With a little interpretation, it points to three things: That thunderbolt 5 will continue to use usb-c as physical contact, that the transfer speed will increase to 80 gigabits per second and that Intel plans to switch to a new transfer technology.

Today’s thunderbolt uses a simple electrical signal, on or off to show one or zero. Each clock cycle is a piece of data. With PAM-3 (PAM stands for Pulse Amplitude Modulation), the signal can have three levels: 1, 0 or -1. Two clock cycles are interpreted together as three bits of data (for example -1, -1 for 000 and 1, -1 for 101). This means that 50 percent more data is sent per clock cycle.